Datasheet

8.3.1 Initializing FEI mode
The following code segment demonstrates setting ICS to FEI mode.
Example: 8.3.1.1 FEI mode initialization routine
/* the following code segment demonstrates setting ICS to FEI mode generating 20MHz bus*/
ICS_C2 = 0x00;
ICS_C1 = 0x04; /* internal reference clock to FLL */
ICS_C3 = 0x00; /* BDIV = 0, no prescalar */
ICS_C3 = TRIM_VALUE_39K0625HZ; /* FLL output 20MHz */
/* the following code segment demonstrates setting ICS to FEI mode generating 5MHz bus*/
ICS_C2 = 0x00;
ICS_C1 = 0x04; /* internal reference clock to FLL */
ICS_C3 = 0x40; /* BDIV = 2, prescalar = 4 */
ICS_C3 = TRIM_VALUE_39K0625HZ; /* FLL output 20MHz */
/* the following code segment demonstrates setting ICS to FEI mode generating 500kHz bus*/
ICS_C2 = 0x00;
ICS_C1 = 0x04; /* internal reference clock to FLL */
ICS_C3 = 0xA0; /* BDIV = 5, prescalar = 32 */
ICS_C3 = TRIM_VALUE_31K25HZ; /* FLL output 16MHz */
8.3.2 Initializing FBI mode
The following code segment demonstrates setting ICS to FEI mode.
Example: 8.3.2.1 FEI mode initialization routine
/* the following code segment demonstrates setting ICS to FEI mode generating 32768Hz bus*/
ICS_C2 = 0x00;
ICS_C1 = 0x40;
ICS_C3 = 0x00;
ICS_C3 = TRIM_VALUE_32K768HZ;
8.3.3 Initializing FEE mode
The following code segment demonstrates setting ICS to FEE mode.
Example: 8.3.3.1 FEE mode initialization routine
/* the following code segment demonstrates setting ICS to FEE mode generating 8MHZ bus*/
/* supposing external 4MHZ crystal is installed in high gain mode */
ICS_C2 = 0x34; /* high-range, high-gain, oscillator required */
while (ICS_OSCINIT == 0); /* waiting until oscillator is ready */
ICS_C1 = 0x10; /* external clock reference (31.25kHz) to FLL, RDIV = 2, external prescalar =
128 */
ICS_C3 = 0x20; /* BDIV = 1, prescalar = 2 */
Chapter 8 Clock management
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 205