Datasheet

9.10.1.1 ADC channel assignments
The ADC channel assignments for the device are shown in the following table. Reserved
channels convert to an unknown value.
9.10.1.2 Alternate clock
The ADC module is capable of performing conversions using the MCU bus clock, the
bus clock divided by two, the local asynchronous clock (ADACK) within the module, or
the alternate clock, ALTCLK. The alternate clock for the devices is the external oscillator
output (OSCOUT).
The selected clock source must run at a frequency such that the ADC conversion clock
(ADCK) runs at a frequency within its specified range (f
ADCK
) after being divided down
from the ALTCLK input as determined by the ADIV bits.
ALTCLK is active while the MCU is in wait mode provided the conditions described
above are met. This allows ALTCLK to be used as the conversion clock source for the
ADC while the MCU is in wait mode.
ALTCLK cannot be used as the ADC conversion clock source while the MCU is in stop3
mode.
9.10.1.3 Hardware trigger
The ADC hardware trigger is selectable from MTIM0 overflow, RTC overflow, FTM2
match trigger with 8-bit programmable delay, or FTM2 init trigger with 8-bit
programmable delay . The MCU can be configured to use any of those four hardware
trigger sources in run and wait modes. The RTC overflow can be used as ADC hardware
trigger in STOP3 mode. Please refer to ADC hardware trigger.
9.10.1.4 Temperature sensor
The ADC module integrates an on-chip temperature sensor. Following actions must be
performed to use this temperature sensor.
• Configure ADC for long sample with a maximum of 1 MHz clock
• Convert the bandgap voltage reference channel (AD23)
Chapter 9 Chip configurations
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 243