Datasheet

9.10.2.1 ACMP configuration information
The ACMP features four different inputs muxed with both positive and negative inputs to
the ACMP. One is fixed connected to built-in DAC output. ACMP0 and ACMP1 are
externally mapped on pinouts. ACMP2 is reserved. The following table shows the
connection of ACMP input assignments.
Table 9-2. ACMP module external signals
ACMP Channel Connection
0 PTA0/KBI0P0/FTM0CH0/ACMP0/ADP0
1 PTA1/KBI0P1/FTM0CH1/ACMP1/ADP1
2 Reserved
3 DAC output
When using the bandgap reference voltage as the reference voltage to the built-in DAC,
the user must enable the bandgap buffer by setting BGBE =1 in SPMSC1. For value of
bandgap voltage reference see Bandgap reference.
9.10.2.2 ACMP in stop3 mode
ACMP continues to operate in stop3 mode if enabled. If ACMP_SC[ACOPE] is enabled,
comparator output will operate as in the normal operating mode and will control ACMPO
pin. The MCU is brought out of stop when a compare event occurs and
ACMP_SC[ACIE] is enabled; ACF flag sets accordingly.
9.10.2.3 ACMP to FTM configuration information
The ACMP module can be configured to connect the output of the analog comparator to
FTM1 input capture channel 0 by setting ACIC in SOPT2. With ACIC set, the
FTM1CH0 pin is not available externally regardless of the configuration of the FTM1
module for channel 0.
9.10.2.4 ACMP for SCI0 RXD filter
ACMP module output can be directly ejected to SCI0 RxD. In this mode, SCI0 external
RxD pinout does not work. Any external signal tagged to ACMP inputs can be regarded
as input pins. Please refer SCI0 RxD filter.
Chapter 9 Chip configurations
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 247