Datasheet

• Indexed relative to H:X — Five submodes including auto increment
• Indexed relative to SP — Improves C efficiency dramatically
• Memory-to-memory data move instructions with four address mode combinations
• Overflow, half-carry, negative, zero, and carry condition codes support conditional
branching on the results of signed, unsigned, and binary-coded decimal (BCD)
operations
• Efficient bit manipulation instructions
• STOP and WAIT instructions to invoke low-power operating modes
10.2 Programmer's Model and CPU Registers
Figure 10-1 shows the five CPU registers. CPU registers are not part of the memory map.
SP
PC
CARRY
ZERO
NEGATIVE
INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
ACCUMULATOR
A
INDEX REGISTER (X)INDEX REGISTER (H)
STACK POINTER
PROGRAM COUNTER
CCR
CV 1 1 H I N Z
TWO’S COMPLEMENT OVERFLOW
07
0
015
15
0
15
CONDITION CODE REGISTER
16-BIT INDEX REGISTER H:X
78
0
7
Figure 10-1. CPU Registers
10.2.1 Accumulator (A)
The A accumulator is a general-purpose 8-bit register. One input operand from the
arithmetic logic unit (ALU) is connected to the accumulator, and the ALU results are
often stored into the A accumulator after arithmetic and logical operations. The
Programmer's Model and CPU Registers
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
252 Freescale Semiconductor, Inc.