Datasheet

10.3.5 Extended Addressing Mode (EXT)
In extended addressing, the full 16-bit address of the memory location to be operated on
is provided in the instruction. Extended addressing can access any location in the 64 KB
memory map.
Example:
LDA $F03B
This instruction uses extended addressing because $F03B is above the zero page. In most
assemblers, the programmer does not need to specify whether an instruction is direct or
extended. The assembler automatically selects the shortest form of the instruction.
10.3.6 Indexed Addressing Mode
Indexed addressing mode has seven variations, including five that use the 16-bit H:X
index register pair and two that use the stack pointer as the base reference.
10.3.6.1 Indexed, No Offset (IX)
Instructions using the indexed, no offset addressing mode are one-byte instructions that
can access data with variable addresses. The X (Index register low byte) register contains
the low byte of the conditional address of the operand and the H (Index register high
byte) register contains the high byte of the address.
Indexed, no offset instructions can move a pointer through a table or hold the address of a
frequently used RAM or input/output (I/O) location.
10.3.6.2 Indexed, No Offset with Post Increment (IX+)
Instructions using the indexed, no offset with post increment addressing mode are two-
byte instructions that address the operands and then increment the Index register (H:X).
The X (Index register low byte) register contains the low byte of the conditional address
of the operand and the H (Index register high byte) register contains the high byte of the
address. This addressing mode is usually used for table searches. MOV and CBEQ
instructions use this addressing mode as well.
Addressing Modes
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
258 Freescale Semiconductor, Inc.