Datasheet

10.3.7.2 Immediate to Direct
This addressing mode is used to move an 8-bit constant to any location in the direct page
memory. The source data is the byte immediately following the opcode, and the
destination is addressed by the second byte following the opcode.
10.3.7.3 Indexed to Direct, Post Increment
Used only by the MOV instruction, this addressing mode accesses a source operand
addressed by the H:X register, and a destination location within the direct page addressed
by the byte following the opcode. H:X is incremented after the source operand is
accessed.
10.3.7.4 Direct to Indexed, Post-Increment
Used only with the MOV instruction, this addressing mode accesses a source operand
addressed by the byte following the opcode, and a destination location addressed by the
H:X register. H:X is incremented after the destination operand is written.
10.4 Operation modes
The CPU can be placed into the following operation modes: stop, wait, background and
security.
10.4.1 Stop mode
Usually, all system clocks, including the crystal oscillator (when used), are halted during
stop mode to minimize power consumption. In such systems, external circuitry is needed
to control the time spent in stop mode and to issue a signal to wake up the target MCU
when it is time to resume processing. Unlike the earlier M68HC05 and M68HC08
MCUs, the HCS08 V6 can be configured to keep a minimum set of clocks running in
stop mode. This optionally allows an internal periodic signal to wake the target MCU
from stop mode.
When a host debug system is connected to the background debug pin (BKGD) and the
ENBDM control bit has been set by a serial command through the background interface
(or because the MCU was reset into active background mode), the oscillator is forced to
Chapter 10 Central processor unit
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 261