Datasheet
Section number Title Page
21.5.4 CRC Data 3 Register (CRC_D3).....................................................................................................................569
21.5.5 CRC Polynomial 0 Register (CRC_P0)...........................................................................................................569
21.5.6 CRC Polynomial 1 Register (CRC_P1)...........................................................................................................570
21.5.7 CRC Polynomial 2 Register (CRC_P2)...........................................................................................................570
21.5.8 CRC Polynomial 3 Register (CRC_P3)...........................................................................................................571
21.5.9 CRC Control Register (CRC_CTRL)..............................................................................................................571
21.6 Functional description.....................................................................................................................................................572
21.6.1 16-bit CRC calculation.....................................................................................................................................572
21.6.2 32-bit CRC calculation.....................................................................................................................................572
21.6.3 Bit reverse........................................................................................................................................................573
21.6.4 Result complement...........................................................................................................................................573
21.6.5 CCITT compliant CRC example......................................................................................................................573
Chapter 22
Watchdog (WDOG)
22.1 Introduction.....................................................................................................................................................................575
22.1.1 Features............................................................................................................................................................575
22.1.2 Block diagram..................................................................................................................................................576
22.2 Memory map and register definition...............................................................................................................................577
22.2.1 Watchdog Control and Status Register 1 (WDOG_CS1)................................................................................577
22.2.2 Watchdog Control and Status Register 2 (WDOG_CS2)................................................................................579
22.2.3 Watchdog Counter Register: High (WDOG_CNTH)......................................................................................580
22.2.4 Watchdog Counter Register: Low (WDOG_CNTL).......................................................................................580
22.2.5 Watchdog Timeout Value Register: High (WDOG_TOVALH).....................................................................581
22.2.6 Watchdog Timeout Value Register: Low (WDOG_TOVALL)......................................................................581
22.2.7 Watchdog Window Register: High (WDOG_WINH).....................................................................................582
22.2.8 Watchdog Window Register: Low (WDOG_WINL)......................................................................................582
22.3 Functional description.....................................................................................................................................................583
22.3.1 Watchdog refresh mechanism..........................................................................................................................583
22.3.1.1 Window mode................................................................................................................................584
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
28 Freescale Semiconductor, Inc.