Datasheet

12.2 Signal description
The following table shows the user-accessible signals for the FTM.
Table 12-1. Signal properties
Name Function
EXTCLK External clock – FTM external clock can be selected to drive the FTM counter.
CHn
1
Channel (n) – I/O pin associated with FTM channel (n).
FAULTj
2
Fault input (j) – input pin associated with fault input (j).
1. n = channel number (0 to 7)
2. j = fault input (0 to 3)
12.2.1 EXTCLK — FTM external clock
The external clock input signal is used as the FTM counter clock if selected by
CLKS[1:0] bits in the SC register. This clock signal must not exceed 1/4 of system clock
frequency. The FTM counter prescaler selection and settings are also used when an
external clock is selected.
12.2.2 CHn — FTM channel (n) I/O pin
Each FTM channel can be configured to operate either as input or output. The direction
associated with each channel, input or output, is selected according to the mode assigned
for that channel.
12.2.3 FAULTj — FTM fault input
The fault input signals are used to control the CHn channel output state. If a fault is
detected, the FAULTj signal is asserted and the channel output is put in a safe state. The
behavior of the fault logic is defined by the FAULTM[1:0] control bits in the MODE
register and FAULTEN bit in the COMBINEm register. Note that each FAULTj input
may affect all channels selectively since FAULTM[1:0] and FAULTEN control bits are
defined for each pair of channels. Each FAULTj input is activated by its corresponding
FAULTjEN bit in the FLTCTRL register.
Signal description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
292 Freescale Semiconductor, Inc.