Datasheet
FTM memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
30C4 Modulo Low (FTM2_MODL) 8 R/W 00h 12.3.7/300
30C5 Channel Status and Control (FTM2_C0SC) 8 R/W 00h 12.3.8/300
30C6 Channel Value High (FTM2_C0VH) 8 R/W 00h 12.3.9/303
30C7 Channel Value Low (FTM2_C0VL) 8 R/W 00h 12.3.10/304
30C8 Channel Status and Control (FTM2_C1SC) 8 R/W 00h 12.3.8/300
30C9 Channel Value High (FTM2_C1VH) 8 R/W 00h 12.3.9/303
30CA Channel Value Low (FTM2_C1VL) 8 R/W 00h 12.3.10/304
30CB Channel Status and Control (FTM2_C2SC) 8 R/W 00h 12.3.8/300
30CC Channel Value High (FTM2_C2VH) 8 R/W 00h 12.3.9/303
30CD Channel Value Low (FTM2_C2VL) 8 R/W 00h 12.3.10/304
30CE Channel Status and Control (FTM2_C3SC) 8 R/W 00h 12.3.8/300
30CF Channel Value High (FTM2_C3VH) 8 R/W 00h 12.3.9/303
30D0 Channel Value Low (FTM2_C3VL) 8 R/W 00h 12.3.10/304
30D1 Channel Status and Control (FTM2_C4SC) 8 R/W 00h 12.3.8/300
30D2 Channel Value High (FTM2_C4VH) 8 R/W 00h 12.3.9/303
30D3 Channel Value Low (FTM2_C4VL) 8 R/W 00h 12.3.10/304
30D4 Channel Status and Control (FTM2_C5SC) 8 R/W 00h 12.3.8/300
30D5 Channel Value High (FTM2_C5VH) 8 R/W 00h 12.3.9/303
30D6 Channel Value Low (FTM2_C5VL) 8 R/W 00h 12.3.10/304
30D7 Counter Initial Value High (FTM2_CNTINH) 8 R/W 00h 12.3.11/304
30D8 Counter Initial Value Low (FTM2_CNTINL) 8 R/W 00h 12.3.12/305
30D9 Capture and Compare Status (FTM2_STATUS) 8 R/W 00h 12.3.13/305
30DA Features Mode Selection (FTM2_MODE) 8 R/W 04h 12.3.14/307
30DB Synchronization (FTM2_SYNC) 8 R/W 00h 12.3.15/309
30DC Initial State for Channel Output (FTM2_OUTINIT) 8 R/W 00h 12.3.16/311
30DD Output Mask (FTM2_OUTMASK) 8 R/W 00h 12.3.17/312
30DE Function for Linked Channels (FTM2_COMBINE0) 8 R/W 00h 12.3.18/313
30DF Function for Linked Channels (FTM2_COMBINE1) 8 R/W 00h 12.3.18/313
30E0 Function for Linked Channels (FTM2_COMBINE2) 8 R/W 00h 12.3.18/313
30E2 Deadtime Insertion Control (FTM2_DEADTIME) 8 R/W 00h 12.3.19/315
30E3 External Trigger (FTM2_EXTTRIG) 8 R/W 00h 12.3.20/316
30E4 Channels Polarity (FTM2_POL) 8 R/W 00h 12.3.21/317
30E5 Fault Mode Status (FTM2_FMS) 8 R/W 00h 12.3.22/319
30E6 Input Capture Filter Control (FTM2_FILTER0) 8 R/W 00h 12.3.23/321
30E7 Input Capture Filter Control (FTM2_FILTER1) 8 R/W 00h 12.3.23/321
30E8 Fault Input Filter Control (FTM2_FLTFILTER) 8 R/W 00h 12.3.24/322
30E9 Fault Input Control (FTM2_FLTCTRL) 8 R/W 00h 12.3.25/322
Memory map and register definition
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
296 Freescale Semiconductor, Inc.
