Datasheet

12.3.3 Status and Control (FTMx_SC)
SC contains the overflow status flag and control bits used to configure the interrupt
enable, FTM configuration, clock source, and prescaler factor. These controls relate to all
channels within this module.
Address: Base address + 0h offset
Bit 7 6 5 4 3 2 1 0
Read TOF
TOIE CPWMS CLKS PS
Write 0
Reset
0 0 0 0 0 0 0 0
FTMx_SC field descriptions
Field Description
7
TOF
Timer Overflow Flag
Set by hardware when the FTM counter passes the value in the Counter Modulo registers. The TOF bit is
cleared by reading the SC register while TOF is set and then writing a 0 to TOF bit. Writing a 1 to TOF has
no effect.
If another FTM overflow occurs between the read and write operations, the write operation has no effect;
therefore, TOF remains set indicating an overflow has occurred. In this case a TOF interrupt request is not
lost due to the clearing sequence for a previous TOF.
0 FTM counter has not overflowed.
1 FTM counter has overflowed.
6
TOIE
Timer Overflow Interrupt Enable
Enables FTM overflow interrupts.
0 Disable TOF interrupts. Use software polling.
1 Enable TOF interrupts. An interrupt is generated when TOF equals one.
5
CPWMS
Center-aligned PWM Select
Selects CPWM mode. This mode configures the FTM to operate in up-down counting mode.
CPWMS is write protected. It can be written only when MODE[WPDIS] = 1.
0 FTM counter operates in up counting mode.
1 FTM counter operates in up-down counting mode.
4–3
CLKS
Clock Source Selection
Selects one of the three FTM counter clock sources.
CLKS is write protected. It can be written only when MODE[WPDIS] = 1.
00 No clock selected (this in effect disables the FTM counter).
01
If MODE[FTMEN] = 0, the System clock divided by 2 is selected. If MODE[FTMEN] = 1, the System
clock is selected.
10 Fixed frequency clock
11 External clock
Table continues on the next page...
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 297