Datasheet
Table 12-70. Mode, edge, and level selection (continued)
DECAPEN COMBINE CPWMS MSnB:MSnA ELSnB:ELSnA Mode Configuration
0 0 0 00 01 Input capture Capture on
Rising Edge
Only
10 Capture on
Falling Edge
Only
11 Capture on
Rising or Falling
Edge
01 01 Output compare Toggle Output
on match
10 Clear Output on
match
11 Set Output on
match
1X 10 Edge-aligned
PWM
High-true pulses
(clear Output on
match)
X1 Low-true pulses
(set Output on
match)
1 XX 10 Center-aligned
PWM
High-true pulses
(clear Output on
match-up)
X1 Low-true pulses
(set Output on
match-up)
1 0 XX 10 Combine PWM High-true pulses
(set on channel
(n) match, and
clear on channel
(n+1) match)
X1 Low-true pulses
(clear on
channel (n)
match, and set
on channel (n
+1) match)
1 0 0 X0 See the
following table.
Dual Edge
Capture Mode
One-shot
capture mode
X1 Continuous
capture mode
Table 12-71. Dual edge capture mode — edge polarity selection
ELSnB ELSnA Channel Port Enable Detected Edges
0 0 Disabled No edge
Table continues on the next page...
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 301
