Datasheet

FTMx_OUTINIT field descriptions (continued)
Field Description
0 The initialization value is 0.
1 The initialization value is 1.
0
CH0OI
Channel 0 Output Initialization Value
Selects the value that is forced into the channel output when the initialization occurs.
0 The initialization value is 0.
1 The initialization value is 1.
12.3.17 Output Mask (FTMx_OUTMASK)
This register provides a mask for each FTM channel. The mask of a channel determines if
its output responds, that is, it is masked or not, when a match occurs. This feature is used
for BLDC control applications where the PWM signal is presented to an electric motor at
specific times to provide electronic commutation.
Any write to the OUTMASK register stores the value into a write buffer. The register is
updated with the value of its write buffer according to PWM synchronization.
Address: Base address + 1Dh offset
Bit 7 6 5 4 3 2 1 0
Read
CH7OM CH6OM CH5OM CH4OM CH3OM CH2OM CH1OM CH0OM
Write
Reset
0 0 0 0 0 0 0 0
FTMx_OUTMASK field descriptions
Field Description
7
CH7OM
Channel 7 Output Mask
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
6
CH6OM
Channel 6 Output Mask
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
5
CH5OM
Channel 5 Output Mask
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
Table continues on the next page...
Memory map and register definition
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
312 Freescale Semiconductor, Inc.