Datasheet

FTMx_EXTTRIG field descriptions (continued)
Field Description
4
CH0TRIG
Channel 0 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
3
CH5TRIG
Channel 5 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
2
CH4TRIG
Channel 4 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
1
CH3TRIG
Channel 3 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
0
CH2TRIG
Channel 2 Trigger Enable
Enables the generation of the channel trigger when the FTM counter is equal to the CV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
12.3.21 Channels Polarity (FTMx_POL)
This register defines the output polarity of the FTM channels.
NOTE
The safe value that is driven in a channel output when the fault
control is enabled and a fault condition is detected is the
inactive state of the channel. That is, the safe value of a channel
is the value of its POL bit.
Address: Base address + 24h offset
Bit 7 6 5 4 3 2 1 0
Read
POL7 POL6 POL5 POL4 POL3 POL2 POL1 POL0
Write
Reset
0 0 0 0 0 0 0 0
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 317