Datasheet

FTMx_FMS field descriptions (continued)
Field Description
4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3
FAULTF3
Fault Detection Flag 3
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected in the fault input.
Clear FAULTF by reading the FMS register while FAULTFn is set and then writing a 0 to FAULTFn
FAULTF while there is no existing fault condition at the fault input n. Writing a 1 to FAULTFn has no effect.
FAULTFn bit is also cleared when FAULTF bit is cleared.
If another fault condition is detected at fault input n before the clearing sequence is completed, the
sequence is reset so FAULTFn remains set after the clearing sequence is completed for the earlier fault
condition.
0 No fault condition was detected in the fault input.
1 A fault condition was detected in the fault input.
2
FAULTF2
Fault Detection Flag 2
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected in the fault input.
Clear FAULTF by reading the FMS register while FAULTFn is set and then writing a 0 to FAULTFn
FAULTF while there is no existing fault condition at the fault input n. Writing a 1 to FAULTFn has no effect.
FAULTFn bit is also cleared when FAULTF bit is cleared.
If another fault condition is detected at fault input n before the clearing sequence is completed, the
sequence is reset so FAULTFn remains set after the clearing sequence is completed for the earlier fault
condition.
0 No fault condition was detected in the fault input.
1 A fault condition was detected in the fault input.
1
FAULTF1
Fault Detection Flag 1
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected in the fault input.
Clear FAULTF by reading the FMS register while FAULTFn is set and then writing a 0 to FAULTFn
FAULTF while there is no existing fault condition at the fault input n. Writing a 1 to FAULTFn has no effect.
FAULTFn bit is also cleared when FAULTF bit is cleared.
If another fault condition is detected at fault input n before the clearing sequence is completed, the
sequence is reset so FAULTFn remains set after the clearing sequence is completed for the earlier fault
condition.
0 No fault condition was detected in the fault input.
1 A fault condition was detected in the fault input.
0
FAULTF0
Fault Detection Flag 0
Set by hardware when fault control is enabled, the corresponding fault input is enabled and a fault
condition is detected in the fault input.
Clear FAULTF by reading the FMS register while FAULTFn is set and then writing a 0 to FAULTFn
FAULTF while there is no existing fault condition at the fault input n. Writing a 1 to FAULTFn has no effect.
FAULTFn bit is also cleared when FAULTF bit is cleared.
Table continues on the next page...
Memory map and register definition
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
320 Freescale Semiconductor, Inc.