Datasheet

The fixed frequency clock is an alternative clock source for the FTM counter that allows
the selection of a clock other than the system clock or an external clock. This clock input
is defined by chip integration. Refer to chip specific documentation for further
information. Due to FTM hardware implementation limitations, the frequency of the
fixed frequency clock must not exceed the system clock frequency.
The external clock passes through a synchronizer clocked by the system clock to ensure
that counter transitions are properly aligned to system clock transitions. Therefore, to
meet the Nyquist criteria and account for jitter, the frequency of the external clock source
must not exceed 1/4 of the system clock frequency.
12.4.2 Prescaler
The selected counter clock source passes through a prescaler that is a 7-bit counter. The
value of the prescaler is selected by the PS[2:0] bits. The following figure shows an
example of the prescaler counter and FTM counter.
FTM counter
0
0
0
0
0
0 0
0 00 0 0
1
1 1
2 2
3 3
1
1
1 1 11 1 1
1
EPWM
selected input clock
prescaler counter
PS[2:0] = 001
CNTINH:L = 0x0000
MODH:L = 0x0003
Figure 12-187. Example of the prescaler counter
12.4.3 Counter
The FTM has a 16-bit counter that is used by the channels either for input or output
modes. The FTM counter clock is the selected clock divided by the prescaler (see
Prescaler).
The FTM counter has these modes of operation:
• up counting (see Up counting)
• up-down counting (see Up-down counting)
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 325