Datasheet

12.4.11.6 OUTMASK register synchronization
Any write to a CHnOM bit updates the OUTMASK write buffer. The CHnOM bit is
updated with the value of its corresponding bit in the OUTMASK write buffer according
to SYNCHOM and PWMSYNC bits.
• If SYNCHOM = 0, then the CHnOM bit is updated with the value of its write buffer
equivalent in all rising edges of the system clock.
CHnOM bit
system clock
write to CHnOM bit
clear CHnOM
write buffer of CHnOM bit
set CHnOM
Figure 12-230. CHnOM synchronization when (SYNCHOM = 0)
• If SYNCHOM = 1 and PWMSYNC = 0, then this synchronization is made on the
next enabled trigger event. If the trigger event was a software trigger, then the
SWSYNC bit is cleared on the next selected boundary cycle. See the following
figure.
SWSYNC bit
system clock
CHnOM bit is updated
selected boundary cycle
SWSYNC bit is cleared
software trigger event
write 1 to SWSYNC bit
Figure 12-231. CHnOM synchronization when (SYNCHOM = 1), (PWMSYNC = 0) and
software trigger was used
If the trigger event was a hardware trigger, then the trigger enable bit (TRIGn) is
cleared when the trigger n event is detected. See the following figure.
Functional Description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
354 Freescale Semiconductor, Inc.