Datasheet

FTM counter
channel (n) output
(before output mask)
CHnOM bit
channel (n) output
(after output mask)
the beginning of new PWM cycles
configured PWM signal starts
to be available in the channel (n) output
channel (n) output is disabled
Figure 12-241. Output mask
The following table shows the output mask result before the polarity control.
Table 12-247. Output mask result for channel (n) before the polarity
control
CHnOM Output Mask Input Output Mask Result
0 inactive state inactive state
active state active state
1 inactive state inactive state
active state
Note
Output mask is available only in combine mode.
12.4.14 Fault control
The fault control is enabled if (FTMEN = 1) and (FAULTM[1:0] ≠ 0:0).
FTM can have up to four fault inputs. FAULTnEN bit (where n = 0, 1, 2, 3) enables the
fault input n and FFLTRnEN bit enables the fault input n filter. FFVAL[3:0] bits select
the value of the enabled filter in each enabled fault input.
First, each fault input signal is synchronized by the system clock; see the synchronizer
block in the following figure. Following synchronization, the fault input n signal enters
the filter block. When there is a state change in the fault input n signal, the 5-bit counter
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 363