Datasheet

enable the measurement of next period. The CH(n)F bit is set when the first rising edge is
detected, that is, the edge selected by ELS(n)B:ELS(n)A bits. The CH(n+1)F bit is set
and DECAP bit is cleared when the second rising edge is detected, that is, the edge
selected by ELS(n+1)B:ELS(n+1)A bits. Both DECAP and CH(n+1)F bits indicate when
two selected edges were captured and the C(n)VH:L and C(n+1)VH:L registers are ready
for reading.
channel (n) input
(after the filter
DECAPEN bit
C(n+1)VH:L
FTM counter
clear CH(n+1)F
problem 2
2
1
2
3
channel input)
DECAP bit
set DECAPEN
set DECAP
5
6
7
8
10
3
4
6
5
Note
- The commands set DECAPEN, set DECAP, clear CH(n)F, and clear CH(n+1)F are made by the user.
4
9
11
12
13
14
6
15
16
17
18
19
20
21
22
23
24
25
26
27
28
17
20
15
20
23
CH(n+1)F bit
CH(n)F bit
clear CH(n)F
1
- Problem 1: channel (n) input = 0, set DECAP, not clear CH(n)F, and not clear CH(n+1)F.
- Problem 2: channel (n) input = 1, set DECAP, not clear CH(n)F, and clear CH(n+1)F.
- Problem 3: channel (n) input = 1, set DECAP, not clear CH(n)F, and not clear CH(n+1)F.
problem 3
problem 1
7
9
18 26
18
14
27
7
C(n)VH:L
Figure 12-256. Dual edge capture – one-shot mode to measure of the period between
two consecutive rising edges
The following figure shows an example of the dual edge capture – continuous mode used
to measure the period between two consecutive rising edges. The DECAPEN bit selects
the dual edge capture mode, so it keeps set in all operation mode. While the DECAP bit
is set the configured measurements are made. The CH(n)F bit is set when the first rising
edge is detected, that is, the edge selected by ELS(n)B:ELS(n)A bits. The CH(n+1)F bit
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 377