Datasheet

(1) FTM reset
. . .
0x0015
0x0014
0x0013
0x0012
0x0010
0x0017
0x0016
XXXX 0x0000
0x0011
FTM counter
CLKS[1:0]
channel (n) output
(5) write 0b01 to CLKS[1:0]
(3) write any value to
CNTH or CNTL registers
(2) FTM configuration
channel (n) pin is controlled by FTM
Note
– CNTINH:L = 0x0010
– Channel (n) is in output compare and the channel (n) output is toggled when there is a match
– C(n)VH:L = 0x0014
0b00
XX
0b01
(4) use of initialization to update
the channel output to the zero
Figure 12-260. FTM behavior after the reset when the channel (n) is in output compare
mode
FTM Interrupts
12.6.1 Timer overflow interrupt
The timer overflow interrupt is generated when (TOIE = 1) and (TOF = 1).
12.6.2 Channel (n) interrupt
The channel (n) interrupt is generated when (CHnIE = 1) and (CHnF = 1).
12.6.3 Fault interrupt
The fault interrupt is generated when (FAULTIE = 1) and (FAULTF = 1).
12.6
Chapter 12 FlexTimer Module (FTM)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 383