Datasheet

The MTIM allows for an optional interrupt to be generated whenever SC[TOF] is set. To
enable the MTIM overflow interrupt, set the MTIM overflow interrupt enable bit
(SC[TOIE]). SC[TOIE] must never be written to a 1 while SC[TOF] = 1. Instead,
SC[TOF] must be cleared first, then the SC[TOIE] can be set to 1.
13.7.1 MTIM operation example
This section shows an example of the MTIM operation as the counter reaches a matching
value from the modulo register.
selected
clock source
MTIM_CNT
MTIM clock
(PS=%0010)
MTIM_MOD:
0xA7 0xA8 0xA9 0xAA 0x00 0x01
0xAA
Figure 13-14. MTIM counter overflow example
In the above example, the selected clock source could be any of the four possible choices.
The prescaler is set to CLK[PS] = 0010b or divide-by-4. The modulo value in the
MTIM_MOD register is set to 0xAA. When the counter, MTIM_CNT, reaches the
modulo value of 0xAA, it overflows to 0x00 and continues counting. The timer overflow
flag, SC[TOF], sets when the counter value changes from 0xAA to 0x00. An MTIM
overflow interrupt is generated when SC[TOF] is set, if SC[TOIE] = 1.
Functional description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
392 Freescale Semiconductor, Inc.