Datasheet

Section number Title Page
3.2.5 LVD enabled in stop mode..............................................................................................................................53
3.2.6 Power modes behaviors...................................................................................................................................53
3.3 Low voltage detect (LVD) system..................................................................................................................................54
3.3.1 Power-on reset (POR) operation......................................................................................................................55
3.3.2 LVD reset operation.........................................................................................................................................55
3.3.3 Low-voltage warning (LVW)..........................................................................................................................55
3.4 Bandgap reference..........................................................................................................................................................56
3.5 Power management control bits and registers................................................................................................................56
3.5.1 System Power Management Status and Control 1 Register (PMC_SPMSC1)................................................56
3.5.2 System Power Management Status and Control 2 Register (PMC_SPMSC2)................................................58
Chapter 4
Memory map
4.1 Memory map...................................................................................................................................................................59
4.2 Reset and interrupt vector assignments...........................................................................................................................60
4.3 Register addresses and bit assignments..........................................................................................................................61
4.4 Random-access memory (RAM)....................................................................................................................................72
4.5 Flash and EEPROM........................................................................................................................................................73
4.5.1 Overview..........................................................................................................................................................73
4.5.2 Function descriptions.......................................................................................................................................75
4.5.2.1 Modes of operation........................................................................................................................75
4.5.2.2 Flash and EEPROM memory map.................................................................................................75
4.5.2.3 Flash and EEPROM initialization after system reset.....................................................................76
4.5.2.4 Flash and EEPROM command operations.....................................................................................76
4.5.2.5 Flash and EEPROM interrupts.......................................................................................................82
4.5.2.6 Protection.......................................................................................................................................83
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
4 Freescale Semiconductor, Inc.