Datasheet

• Loop mode
• Single-wire mode
15.1.3 Block diagram
The following figure shows the transmitter portion of the SCI.
H 8 7 6 5 4 3 2 1 0 L
SCID – Tx Buffer
(Write-Only)
Internal Bus
Stop
11-BIT Transmit Shift Register
Start
SHIFT DIRECTION
lsb
1 Baud
Rate Clock
Parity
Generation
Transmit Control
Shift Enable
Preamble (All 1s)
Break (All 0s)
SCI Controls TxD
TxD Direction
TO TxD
Pin Logic
Loop
Control
To Receive
Data In
To TxD Pin
Tx Interrupt
Request
LOOPS
RSRC
TIE
TC
TDRE
M
PT
PE
TCIE
TE
SBK
T8
TXDIR
Load From SCIxD
TXINV
BRK13
Figure 15-1. SCI transmitter block diagram
The following figure shows the receiver portion of the SCI.
Introduction
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
404 Freescale Semiconductor, Inc.