Datasheet

H 8 7 6 5 4 3 2 1 0 L
SCID – Tx Buffer
(Write-Only)
Internal Bus
Stop
11-BIT Transmit Shift Register
Start
SHIFT DIRECTION
lsb
1 Baud
Rate Clock
Parity
Generation
Transmit Control
Shift Enable
Preamble (All 1s)
Break (All 0s)
SCI Controls TxD
TxD Direction
TO TxD
Pin Logic
Loop
Control
To Receive
Data In
To TxD Pin
Tx Interrupt
Request
LOOPS
RSRC
TIE
TC
TDRE
M
PT
PE
TCIE
TE
SBK
T8
TXDIR
Load From SCIxD
TXINV
BRK13
Figure 15-2. SCI receiver block diagram
15.2 Register definition
The SCI has 8-bit registers to control baud rate, select SCI options, report SCI status, and
for transmit/receive data.
Refer to the direct-page register summary in the memory chapter of this document or the
absolute address assignments for all SCI registers. This section refers to registers and
control bits only by their names. A Freescale-provided equate or header file is used to
translate these names into the appropriate absolute addresses.
Chapter 15 Serial communications interface (SCI)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 405