Datasheet

interrupts, software polling may be used to monitor the SCI_S1[TDRE] and SCI_S1[TC]
status flags if the corresponding SCI_C2[TIE] or SCI_C2[TCIE] local interrupt masks
are cleared.
When a program detects that the receive data register is full (SCI_S1[RDRF] = 1), it gets
the data from the receive data register by reading SCI_D. The SCI_S1[RDRF] flag is
cleared by reading SCIxS1 while SCI_S1[RDRF] is set and then reading SCI_D.
When polling is used, this sequence is naturally satisfied in the normal course of the user
program. If hardware interrupts are used, SCIxS1 must be read in the interrupt service
routine (ISR). Normally, this is done in the ISR anyway to check for receive errors, so the
sequence is automatically satisfied.
The IDLE status flag includes logic that prevents it from getting set repeatedly when the
RxD line remains idle for an extended period of time. IDLE is cleared by reading SCIxS1
while SCI_S1[IDLE] is set and then reading SCI_D. After SCI_S1[IDLE] has been
cleared, it cannot become set again until the receiver has received at least one new
character and has set SCI_S1[RDRF].
If the associated error was detected in the received character that caused SCI_S1[RDRF]
to be set, the error flags - noise flag (SCI_S1[NF]), framing error (SCI_S1[FE]), and
parity error flag (SCI_S1[PF]) - are set at the same time as SCI_S1[RDRF]. These flags
are not set in overrun cases.
If SCI_S1[RDRF] was already set when a new character is ready to be transferred from
the receive shifter to the receive data buffer, the overrun (SCI_S1[OR]) flag is set instead
of the data along with any associated NF, FE, or PF condition is lost.
At any time, an active edge on the RxD serial data input pin causes the
SCI_S2[RXEDGIF] flag to set. The SCI_S2[RXEDGIF] flag is cleared by writing a 1 to
it. This function depends on the receiver being enabled (SCI_C2[RE] = 1).
15.3.5 Additional SCI functions
The following sections describe additional SCI functions.
15.3.5.1 8- and 9-bit data modes
The SCI system, transmitter and receiver, can be configured to operate in 9-bit data mode
by setting the SCI_C1[M]. In 9-bit mode, there is a ninth data bit to the left of the msb of
the SCI data register. For the transmit data buffer, this bit is stored in T8 in SCI_C3. For
the receiver, the ninth bit is held in SCI_C3[R8].
Functional description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
422 Freescale Semiconductor, Inc.