Datasheet

SPI0_C1 field descriptions (continued)
Field Description
0 SPI system inactive
1 SPI system enabled
5
SPTIE
SPI transmit interrupt enable
This is the interrupt enable bit for SPI transmit buffer empty (SPTEF). An interrupt occurs when the SPI
transmit buffer is empty (SPTEF is set).
0 Interrupts from SPTEF inhibited (use polling)
1 When SPTEF is 1, hardware interrupt requested
4
MSTR
Master/slave mode select
This bit selects master or slave mode operation.
0 SPI module configured as a slave SPI device
1 SPI module configured as a master SPI device
3
CPOL
Clock polarity
This bit selects an inverted or non-inverted SPI clock. To transmit data between SPI modules, the SPI
modules must have identical CPOL values.
This bit effectively places an inverter in series with the clock signal either from a master SPI device or to a
slave SPI device. Refer to the description of “SPI Clock Formats” for details.
0 Active-high SPI clock (idles low)
1 Active-low SPI clock (idles high)
2
CPHA
Clock phase
This bit selects one of two clock formats for different kinds of synchronous serial peripheral devices. Refer
to the description of “SPI Clock Formats” for details.
0 First edge on SPSCK occurs at the middle of the first cycle of a data transfer
1 First edge on SPSCK occurs at the start of the first cycle of a data transfer
1
SSOE
Slave select output enable
This bit is used in combination with the mode fault enable (MODFEN) bit in the C2 register and the master/
slave (MSTR) control bit to determine the function of the SS pin.
0 When MODFEN is 0: In master mode, SS pin function is general-purpose I/O (not SPI). In slave mode,
SS pin function is slave select input.
When MODFEN is 1: In master mode, SS pin function is SS input for mode fault. In slave mode, SS
pin function is slave select input.
1 When MODFEN is 0: In master mode, SS pin function is general-purpose I/O (not SPI). In slave mode,
SS pin function is slave select input.
When MODFEN is 1: In master mode, SS pin function is automatic SS output. In slave mode: SS pin
function is slave select input.
0
LSBFE
LSB first (shifter direction)
This bit does not affect the position of the MSB and LSB in the data register. Reads and writes of the data
register always have the MSB in bit 7.
0 SPI serial data transfers start with most significant bit
1 SPI serial data transfers start with least significant bit
Chapter 16 8-Bit Serial Peripheral Interface (8-bit SPI)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 431