Datasheet

input of a master. The MOSI waveform applies to the MOSI output pin from a master
and the MISO waveform applies to the MISO output from a slave. The SS OUT
waveform applies to the slave select output from a master (provided MODFEN and
SSOE = 1). The master SS output goes to active low one-half SPSCK cycle before the
start of the transfer and goes back high at the end of the eighth bit time of the transfer.
The SS IN waveform applies to the slave select input of a slave.
SS OUT
SS IN
(SLAVE)
(MASTER)
(SLAVE OUT)
MISO
MSB FIRST
LSB FIRST
MOSI
(MASTER OUT)
(MISO OR MOSI)
SAMPLE IN
SPSCK
(CPOL = 1)
SPSCK
(CPOL = 0)
BIT TIME #
(REFERENCE)
BIT 7
BIT 0
BIT 6
BIT 1
BIT 2
BIT 5
BIT 0
BIT 7
BIT 1
BIT 6
1
2 6
7
8
...
...
...
Figure 17-25. SPI Clock Formats (CPHA = 1)
When CPHA = 1, the slave begins to drive its MISO output when SS goes to active low,
but the data is not defined until the first SPSCK edge. The first SPSCK edge shifts the
first bit of data from the shifter onto the MOSI output of the master and the MISO output
of the slave. The next SPSCK edge causes both the master and the slave to sample the
data bit values on their MISO and MOSI inputs, respectively. At the third SPSCK edge,
the SPI shifter shifts one bit position which shifts in the bit value that was just sampled,
and shifts the second data bit value out the other end of the shifter to the MOSI and
MISO outputs of the master and slave, respectively.
Functional Description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
478 Freescale Semiconductor, Inc.