Datasheet

service routine (ISR) should check the flag bits to determine which event caused the

interrupt. The service routine should also clear the flag bit(s) before returning from the

ISR (usually near the beginning of the ISR).

17.4.12.1 MODF

MODF occurs when the master detects an error on the SS pin. The master SPI must be

configured for the MODF feature (see the description of the C1[SSOE] bit). Once MODF

is set, the current transfer is aborted and the master (MSTR) bit in the SPIx_C1 register

resets to 0.

The MODF interrupt is reflected in the status register's MODF flag. Clearing the flag also

clears the interrupt. This interrupt stays active while the MODF flag is set. MODF has an

automatic clearing process that is described in the SPI Status Register.

17.4.12.2 SPRF

SPRF occurs when new data has been received and copied to the SPI receive data buffer.

In 8-bit mode, SPRF is set only after all 8 bits have been shifted out of the shift register

and into SPIx_DL. In 16-bit mode, SPRF is set only after all 16 bits have been shifted out

of the shift register and into SPIx_DH:SPIx_DL.

After SPRF is set, it does not clear until it is serviced. SPRF has an automatic clearing

process that is described in the SPI Status Register details. If the SPRF is not serviced

before the end of the next transfer (that is, SPRF remains active throughout another

transfer), the subsequent transfers are ignored and no new data is copied into the Data

17.4.12.3 SPTEF

SPTEF occurs when the SPI transmit buffer is ready to accept new data. In 8-bit mode,

SPTEF is set only after all 8 bits have been moved from SPIx_DL into the shifter. In 16-

bit mode, SPTEF is set only after all 16 bits have been moved from SPIx_DH:SPIx_DL

into the shifter.

After SPTEF is set, it does not clear until it is serviced. SPTEF has an automatic clearing

process that is described in the SPI Status Register details.

Functional Description

MC9S08PA60 Reference Manual, Rev. 1, 9/2012

486 Freescale Semiconductor, Inc.