Datasheet

I2C memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
3070 I2C Address Register 1 (I2C_A1) 8 R/W 00h 18.3.1/496
3071 I2C Frequency Divider register (I2C_F) 8 R/W 00h 18.3.2/496
3072 I2C Control Register 1 (I2C_C1) 8 R/W 00h 18.3.3/498
3073 I2C Status register (I2C_S) 8 R/W 80h 18.3.4/499
3074 I2C Data I/O register (I2C_D) 8 R/W 00h 18.3.5/501
3075 I2C Control Register 2 (I2C_C2) 8 R/W 00h 18.3.6/501
3076 I2C Programmable Input Glitch Filter register (I2C_FLT) 8 R/W 00h 18.3.7/502
3077 I2C Range Address register (I2C_RA) 8 R/W 00h 18.3.8/503
3078 I2C SMBus Control and Status register (I2C_SMB) 8 R/W 00h 18.3.9/503
3079 I2C Address Register 2 (I2C_A2) 8 R/W C2h 18.3.10/505
307A I2C SCL Low Timeout Register High (I2C_SLTH) 8 R/W 00h 18.3.11/505
307B I2C SCL Low Timeout Register Low (I2C_SLTL) 8 R/W 00h 18.3.12/506
18.3.1 I2C Address Register 1 (I2C_A1)
This register contains the slave address to be used by the I2C module.
Address: 3070h base + 0h offset = 3070h
Bit 7 6 5 4 3 2 1 0
Read
AD[7:1]
0
Write
Reset
0 0 0 0 0 0 0 0
I2C_A1 field descriptions
Field Description
7–1
AD[7:1]
Address
Contains the primary slave address used by the I2C module when it is addressed as a slave. This field is
used in the 7-bit address scheme and the lower seven bits in the 10-bit address scheme.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
18.3.2 I2C Frequency Divider register (I2C_F)
Address: 3070h base + 1h offset = 3071h
Bit 7 6 5 4 3 2 1 0
Read
MULT ICR
Write
Reset
0 0 0 0 0 0 0 0
Memory map and register descriptions
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
496 Freescale Semiconductor, Inc.