Datasheet

19.3.2 Status and Control Register 2 (ADC_SC2)
The ADC_SC2 register controls the compare function, conversion trigger, and conversion
active of the ADC module.
Address: 10h base + 1h offset = 11h
Bit 7 6 5 4 3 2 1 0
Read ADACT
ADTRG ACFE ACFGT
FEMPTY FFULL 0
Write
Reset
0 0 0 0 1 0 0 0
ADC_SC2 field descriptions
Field Description
7
ADACT
Conversion Active
Indicates that a conversion is in progress. ADACT is set when a conversion is initiated and cleared when a
conversion is completed or aborted.
0 Conversion not in progress.
1 Conversion in progress.
6
ADTRG
Conversion Trigger Select
Selects the type of trigger used for initiating a conversion. Two types of trigger are selectable: software
trigger and hardware trigger. When software trigger is selected, a conversion is initiated following a write
to ADC_SC1. When hardware trigger is selected, a conversion is initiated following the assertion of the
ADHWT input.
0 Software trigger selected.
1 Hardware trigger selected.
5
ACFE
Compare Function Enable
Enables the compare function.
0 Compare function disabled.
1 Compare function enabled.
4
ACFGT
Compare Function Greater Than Enable
Configures the compare function to trigger when the result of the conversion of the input being monitored
is greater than or equal to the compare value. The compare function defaults to triggering when the result
of the compare of the input being monitored is less than the compare value.
0 Compare triggers when input is less than compare level.
1 Compare triggers when input is greater than or equal to compare level.
3
FEMPTY
Result FIFO empty
0 Indicates that ADC result FIFO have at least one valid new data.
1 Indicates that ADC result FIFO have no valid new data.
2
FFULL
Result FIFO full
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ADC Control Registers
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
528 Freescale Semiconductor, Inc.