Datasheet

19.3.7 Compare Value High Register (ADC_CVH)
In 12-bit mode, this register holds the upper four bits of the 12-bit compare value. These
bits are compared to the upper four bits of the result following a conversion in 12-bit
mode when the compare function is enabled.
Address: 10h base + 6h offset = 16h
Bit 7 6 5 4 3 2 1 0
Read
CV
Write
Reset
0 0 0 0 0 0 0 0
ADC_CVH field descriptions
Field Description
7–0
CV
Conversion Result[15:8]
19.3.8 Compare Value Low Register (ADC_CVL)
This register holds the lower 8 bits of the 12-bit compare value. Bits CV7:CV0 are
compared to the lower 8 bits of the result following a conversion in 12-bit mode.
Address: 10h base + 7h offset = 17h
Bit 7 6 5 4 3 2 1 0
Read
CV
Write
Reset
0 0 0 0 0 0 0 0
ADC_CVL field descriptions
Field Description
7–0
CV
Conversion Result[7:0]
Chapter 19 Analog-to-digital converter (ADC)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 533