Datasheet

• The input buffer is disabled. A read of the I/O port returns a zero for any pin with its
input buffer disabled.
• The pullup is disabled.
19.4.3 Hardware trigger
The ADC module has a selectable asynchronous hardware conversion trigger, ADHWT,
that is enabled when the ADC_SC2[ADTRG] bit is set. This source is not available on all
MCUs. See the module introduction for information on the ADHWT source specific to
this MCU.
When ADHWT source is available and hardware trigger is enabled
( ADC_SC2[ADTRG] = 1), a conversion is initiated on the rising edge of ADHWT. If a
conversion is in progress when a rising edge occurs, the rising edge is ignored. In
continuous convert configuration, only the initial rising edge to launch continuous
conversions is observed. The hardware trigger function operates in conjunction with any
of the conversion modes and configurations.
19.4.4 Conversion control
Conversions can be performed in 12-bit mode, 10-bit mode, or 8-bit mode as determined
by the ADC_SC3[MODE] bits. Conversions can be initiated by a software or hardware
trigger. In addition, the ADC module can be configured for low power operation, long
sample time, continuous conversion, and an automatic compare of the conversion result
to a software determined compare value.
19.4.4.1 Initiating conversions
A conversion initiates under the following conditions:
• A write to ADC_SC1 or a set of write to ADC_SC1 in FIFO mode (with ADCH bits
not all 1s) if software triggered operation is selected.
• A hardware trigger (ADHWT) event if hardware triggered operation is selected.
• The transfer of the result to the data registers when continuous conversion is enabled.
Functional description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
538 Freescale Semiconductor, Inc.