Datasheet

data set in ACMP_C1[DACVAL] bits to a stepped analog output, which is fed into
ACMP as an internal reference input. This stepped analog output is also mapped out of
the module. The output voltage range is from V
in
/64 to V
in
. The step size is V
in
/64.
The ACMP can achieve the analog comparison between positive input and negative
input, and then give out a digital output and relevant interrupt. Both the positive and
negative input of ACMP can be selected from the four common inputs: three external
reference inputs and one internal reference input from the DAC output. The positive input
of ACMP is selected by ACMP_C0[ACPSEL] bits and the negative input is selected by
ACMP_C0[ACNSEL] bits. Any pair of the eight inputs can be compared by configuring
the ACMPC0 with the appropriate value.
After the ACMP is enabled by setting ACMP_CS[ACE], the comparison result appears
as a digital output. Whenever a valid edge defined in ACMP_CS[ACMOD] occurs, the
ACMP_CS[ACF] bit is asserted. If ACMP_CS[ACIE] is set, a ACMP CPU interrupt
occurs. The valid edge is defined byACMP_CS[ACMOD].When ACMP_CS[ACMOD]
= 00b or 10b, only the falling edge on ACMP output is valid. When
ACMP_CS[ACMOD] = 01b, only rising edge on ACMP output is valid. When
ACMP_CS[ACMOD] = 11b, both the rising edge and falling edge on the ACMP output
are valid.
The ACMP output is synchronized by the bus clock to generate ACMP_CS[ACO] bit so
that the CPU can read the comparison. In stop3 mode, if the output of ACMP is changed,
ACMPO cannot be updated in time. The output can be synchronized and the
ACMP_CS[ACO] bit can be updated upon the waking up of the CPU because of the
availability of the bus clock. The ACMP_CS[ACO] changes following the comparison
result, so it can serve as a tracking flag that continuously indicates the voltage delta on
the inputs.
If a reference input external to the chip is selected as an input of ACMP, the
corresponding ACMP_C2[ACIPE] bit must be set to enable the input from pad interface.
If the output of the ACMP needs to be put onto the external pin, the ACMP_CS[ACOPE]
bit must enable the ACMP pin function of pad logic.
20.5 Setup and operation of ACMP
The two parts of ACMP (DAC and CMP) can be set up and operated independently. But
if the DAC works as an input of the CMP, the DAC must be configured before the
ACMP is enabled.
Chapter 20 Analog comparator (ACMP)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 563