Datasheet

CRC_D1 field descriptions
Field Description
7–0
D1
CRC Data Bit 23:16
21.5.3 CRC Data 2 Register (CRC_D2)
D2 is one of the CRC data registers (D0:D3). The set of CRC data registers contains the
value of seed, data, and checksum. When CRC_CTRL[WAS] bit is set, any write to the
data registers is regarded as seed for CRC module. When CRC_CTRL[WAS] bit is clear,
any write to the data registers is regarded as data for general CRC computation, in which
D0:D2 does not accept any data and D3 accept 8-bit write upon the polynomial
configuration. When final data are written, the final result can be read from the data
register. The registers of D0:D1 contain the MSB 16-bit of CRC data, which is used only
in CRC 32-bit mode. Only D3 is used to dummy data to CRC. Writing D2 will be
ignored when WAS = 0.
Address: 3060h base + 2h offset = 3062h
Bit 7 6 5 4 3 2 1 0
Read
D2
Write
Reset
1 1 1 1 1 1 1 1
CRC_D2 field descriptions
Field Description
7–0
D2
CRC Data Bit 15:8
Register definition
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
568 Freescale Semiconductor, Inc.