Datasheet

PMC_SPMSC1 field descriptions (continued)
Field Description
NOTE: LVWF will be set in the case when V
Supply
transitions below the trip point or after reset and V
Supply
is already below V
LVW
. LVWF bit may be 1 after power on reset, therefore, to use LVW interrupt
function, before enabling LVWIE, LVWF must be cleared by writing LVWACK first.
0 Low-voltage warning is not present.
1 Low-voltage warning is present or was present.
6
LVWACK
Low-Voltage Warning Acknowledge
If LVWF = 1, a low-voltage condition has occurred. To acknowledge this low-voltage warning, write 1 to
LVWACK, which automatically clears LVWF to 0 if the low-voltage warning is no longer present.
5
LVWIE
Low-Voltage Warning Interrupt Enable
This bit enables hardware interrupt requests for LVWF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVWF = 1.
4
LVDRE
Low-Voltage Detect Reset Enable
This write-once bit enables LVD events to generate a hardware reset (provided LVDE = 1).
NOTE: This bit can be written only one time after reset. Additional writes are ignored.
0 LVD events do not generate hardware resets.
1 Force an MCU reset when an enabled low-voltage detect event occurs.
3
LVDSE
Low-Voltage Detect Stop Enable
Provided LVDE = 1, this read/write bit determines whether the low-voltage detect function operates when
the MCU is in stop mode.
0 Low-voltage detect disabled during stop mode.
1 Low-voltage detect enabled during stop mode.
2
LVDE
Low-Voltage Detect Enable
This write-once bit enables low-voltage detect logic and qualifies the operation of other bits in this register.
NOTE: This bit can be written only one time after reset. Additional writes are ignored.
0 LVD logic disabled.
1 LVD logic enabled.
1
BGBDS
Bandgap Buffer Drive Select
This bit is used to select the high drive mode of the bandgap buffer.
0 Bandgap buffer enabled in low drive mode if BGBE = 1.
1 Bandgap buffer enabled in high drive mode if BGBE = 1.
0
BGBE
Bandgap Buffer Enable
This bit enables an internal buffer for the bandgap voltage reference for use by the ADC module on one of
its internal channels.
0 Bandgap buffer disabled.
1 Bandgap buffer enabled.
Chapter 3 Power management
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 57