Datasheet

CRC_CTRL field descriptions (continued)
Field Description
3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
FXOR
Complement of Read
This bit allows CRC module to output the complement of the final CRC checksum.
0 Normal checksum output.
1 Complement of checksum output.
1
WAS
Write CRC data register as seed
This bit indicates the data written to the CRC data register (D0:D3) is seed or data.
0 Data is written in data registers.
1 Seed is written in data registers.
0
TCRC
Width of Polynomial Generator
This bit indicates the bit width of the polynomial generator.
0 16-bit CRC Polynomial Generator.
1 32-bit CRC Polynomial Generator.
21.6 Functional description
21.6.1 16-bit CRC calculation
The following steps show how to start a general 16-bit CRC calculation:
1. Clear CRC_CTRL[TCRC] bit to enable 16-bit CRC mode.
2. Optional to enable reverse and complement function. Please see Bit reverse and
Result complement for details.
3. Write 16-bit polynomial to CRC_P2:CRC_P3.
4. Set CRC_CTRL[WAS] bit to allow CRC_D2:CRC_D3 to be written by seed.
5. Write 16-bit seed to CRC_D2:CRC_D3.
6. Clear CRC_CTRL[WAS] bit to start 16-bit CRC calculation.
7. Dummy CRC_D3 with 8-bit CRC raw data.
8. Get the checksum from CRC_D2:CRC_D3 when all CRC raw data dummied.
21.6.2 32-bit CRC calculation
The following steps show how to start a general 32-bit CRC calculation:
1. Set CRC_CTRL[TCRC] bit to enable 32-bit CRC mode.
Functional description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
572 Freescale Semiconductor, Inc.