Datasheet

WDOG counter
WDOG_WINH:L
Refresh opportunity
in window mode
WDOG_TOVALH:L
0
Time
Refresh opportunity (not in window mode)
Figure 22-10. Refresh opportunity for the Watchdog counter
22.3.1.1 Window mode
Software finishing its main control loop faster than expected could be an indication of a
problem. Depending on the requirements of the application, the WDOG can be
programmed to force a reset when refresh attempts are early.
When window mode is enabled, the watchdog must be refreshed after the counter has
reached a minimum expected time value; otherwise, the watchdog resets the MCU. The
minimum expected time value is specified in the WDOG_WINH:L registers. Setting the
WDOG_CS1[WIN] bit enables window mode.
22.3.1.2 Refreshing the Watchdog
The refresh write sequence is a write of 0xA602 followed by a write of 0xB480 to the
WDOG_CNTH:L registers. The write of the 0xB480 must occur within 16 bus clocks
after the write of 0xA602; otherwise, the watchdog resets the MCU.
Functional description
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
584 Freescale Semiconductor, Inc.