Datasheet

22.3.3 Clock source
The watchdog counter has four clock source options selected by programming the
WDOG_CS2[CLK] bits:
• bus clock
• internal Low Power Oscillator (LPO) running at approximately 1 kHz (This is the
default source.)
• internal 32 kHz clock
• external clock
The options allow software to select a clock source independent of the bus clock for
applications that need to meet more robust safety requirements. Using a clock source
other than the bus clock ensures that the watchdog counter continues to run if the bus
clock is somehow halted; see the "Backup reset“section.
An optional fixed prescaler for all clock sources allows for longer timeout periods. When
the WDOG_CS2[PRES] bit is set, the clock source is pre-scaled by 256 before clocking
the watchdog counter.
The following table summarizes the different watchdog timeout periods available.
Table 22-10. Watchdog timeout availability
Reference clock Prescaler Watchdog time-out availability
Internal ~1kHz (LPO)
Pass through ~1ms — 65.5s
1
÷256 ~256ms — 16,777s
Internal ~32kHz
Pass through ~31.25µs — 2.048s
÷256 ~8ms— 524.3s
1MHz (from bus or external)
Pass through 1µs — 65.54ms
÷256 256µs — 16.777s
20MHz (from bus or external)
Pass through 50ns — 3.277ms
÷256 12.8µs — 838.8ms
1. The default timeout value after reset is approximately 4 ms.
NOTE
When the programmer switches clock sources during
reconfiguration, the watchdog hardware holds the counter at
zero for 2.5 periods of the previous clock source and 2.5
periods of the new clock source after the configuration time
period (128 bus clocks) ends. This delay ensures a smooth
transition before restarting the counter with the new
configuration.
Chapter 22 Watchdog (WDOG)
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 587