Datasheet

Chapter 24
Debug module (DBG)
24.1 Introduction
The DBG module implements an on-chip ICE (in-circuit emulation) system and allows
non-intrusive debug of application software by providing an on-chip trace buffer with
flexible triggering capability. The trigger also can provide extended breakpoint capacity.
The on-chip ICE system is optimized for the S08CPUV6 8-bit architecture and supports 2
M bytes of memory space.
24.1.1 Features
The on-chip ICE system includes these distinctive features:
• Three comparators (A, B, and C) with ability to match addresses in 64 KB space
• Dual mode, Comparators A and B used to compare addresses
• Full mode, Comparator A compares address and Comparator B compares data
• Can be used as triggers and/or breakpoints
• Comparator C can be used as a normal hardware breakpoint
• Loop1 capture mode, Comparator C is used to track most recent COF event
captured into FIFO
• Tag and Force type breakpoints
• Nine trigger modes
• A
• A Or B
• A then B
• A and B, where B is data (full mode)
• A and not B, where B is data (full mode)
• Event only B, store data
• A then event only B, store data
• Inside range, A ≤ address ≤ B
• Outside range, address < A or address > B
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 611