Datasheet
• Direct-page registers are located in the first 64 locations in the memory map, so they
can be accessed with efficient direct addressing mode instructions.
• High-page registers are used much less often, so they are located above 0x3000 in
the memory map. This leaves room in the direct page for more frequently used
registers and variables.
Direct-page registers can be accessed with efficient direct addressing mode instructions.
Bit manipulation instructions can be used to access any bit in a direct-page register.
The direct page registers can use the more efficient direct addressing mode, which
requires only the lower byte of the address.
The following tables are summaries of all user-accessible direct-page and high-page
registers and control bits. Cells that are not associated with named bits are shaded. A
shaded cell with a 0 indicates this unused bit always reads as a 0; and a shaded cell with a
1 indicates this unused bit always reads as a 1. Shaded cells with dashes indicate unused
or reserved bit locations that could read as 1s or 0s.
Table 4-3. Direct-page register allocation
Address Register name Bit 7 6 5 4 3 2 1 Bit 0
0x0000
PORT_PTAD
PTAD7 PTAD6 PTAD5 PTAD4 PTAD3 PTAD2 PTAD1 PTAD0
0x0001 PORT_PTBD PTBD7 PTBD6 PTBD5 PTBD4 PTBD3 PTBD2 PTBD1 PTBD0
0x0002 PORT_PTCD PTCD7 PTCD6 PTCD5 PTCD4 PTCD3 PTCD2 PTCD1 PTCD0
0x0003 PORT_PTDD PTDD7 PTDD6 PTDD5 PTDD4 PTDD3 PTDD2 PTDD1 PTDD0
0x0004 PORT_PTED PTED7 PTED6 PTED5 PTED4 PTED3 PTED2 PTED1 PTED0
0x0005 PORT_PTFD PTFD7 PTFD6 PTFD5 PTFD4 PTFD3 PTFD2 PTFD1 PTFD0
0x0006 PORT_PTGD — — — — PTGD3 PTGD2 PTGD1 PTGD0
0x0007 PORT_PTHD PTHD7 PTHD6 — — — PTHD2 PTHD1 PTHD0
0x0008-0x000F Reserved — — — — — — — —
0x0010 ADC_SC1 COCO AIEN ADCO ADCH
0x0011 ADC_SC2 ADACT ADTRG ACFE ACFGT
FEMPT
Y
FFULL — —
0x0012 ADC_SC3 ADLPC ADIV
ADLSM
P
MODE ADICLK
0x0013 ADC_SC4 —
ASCAN
E
ACFSEL — — AFDEP
0x0014 ADC_RH Bit 15 14 13 12 11 10 9 Bit 8
0x0015 ADC_RL Bit 7 6 5 4 3 2 1 Bit 0
0x0016 ADC_CVH Bit 15 14 13 12 11 10 9 Bit 8
0x0017 ADC_CVL Bit 7 6 5 4 3 2 1 Bit 0
0x0018 MTIM0_SC TOF TOIE TRST TSTP — — — —
0x0019 MTIM0_CLK — — CLKS PS
Table continues on the next page...
Chapter 4 Memory map
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 63