Datasheet
Section number Title Page
6.6 System Control Registers................................................................................................................................................137
6.6.1 System Reset Status Register (SYS_SRS).......................................................................................................137
6.6.2 System Background Debug Force Reset Register (SYS_SBDFR)..................................................................139
6.6.3 System Device Identification Register: High (SYS_SDIDH).........................................................................140
6.6.4 System Device Identification Register: Low (SYS_SDIDL)..........................................................................140
6.6.5 System Options Register 1 (SYS_SOPT1)......................................................................................................141
6.6.6 System Options Register 2 (SYS_SOPT2)......................................................................................................142
6.6.7 System Options Register 3 (SYS_SOPT3)......................................................................................................143
6.6.8 System Options Register 4 (SYS_SOPT4)......................................................................................................144
6.6.9 Illegal Address Register: High (SYS_ILLAH)................................................................................................145
6.6.10 Illegal Address Register: Low (SYS_ILLAL).................................................................................................145
6.6.11 Universally Unique Identifier Register 1 (SYS_UUID1)................................................................................146
6.6.12 Universally Unique Identifier Register 2 (SYS_UUID2)................................................................................146
6.6.13 Universally Unique Identifier Register 3 (SYS_UUID3)................................................................................147
6.6.14 Universally Unique Identifier Register 4 (SYS_UUID4)................................................................................147
6.6.15 Universally Unique Identifier Register 5 (SYS_UUID5)................................................................................148
6.6.16 Universally Unique Identifier Register 6 (SYS_UUID6)................................................................................148
6.6.17 Universally Unique Identifier Register 7 (SYS_UUID7)................................................................................149
6.6.18 Universally Unique Identifier Register 8 (SYS_UUID8)................................................................................149
Chapter 7
Parallel input/output
7.1 Introduction.....................................................................................................................................................................151
7.2 Port data and data direction.............................................................................................................................................153
7.3 Internal pullup enable.....................................................................................................................................................154
7.4 Input glitch filter setting..................................................................................................................................................154
7.5 High current drive...........................................................................................................................................................155
7.6 Pin behavior in stop mode...............................................................................................................................................155
7.7 Port data registers............................................................................................................................................................155
7.7.1 Port A Data Register (PORT_PTAD)..............................................................................................................156
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 7