Datasheet

Table 4-4. High-page register allocation (continued)
Address Register name Bit 7 6 5 4 3 2 1 Bit 0
0x30E3
FTM2_EXTTRIG
TRIGF
INITTRI
GEN
CH1TRI
G
CH0TRI
G
CH5TRI
G
CH4TRI
G
CH3TRI
G
CH2TRI
G
0x30E4 FTM2_POL POL7 POL6 POL5 POL4 POL3 POL2 POL1 POL0
0x30E5 FTM2_FMS FAULTF WPEN
FAULTI
N
— —
FAULTF
2
FAULTF
1
FAULTF
0
0x30E6 FTM2_FILTER0 CHoddFVAL CHevenFVAL
0x30E7 FTM2_FILTER1 CHoddFVAL CHevenFVAL
0x30E8 FTM2_FLTFILTER — — — — FFVAL
0x30E9 FTM2_FLTCTRL
FFLTR3
EN
FFLTR2
EN
FFLTR1
EN
FFLTR0
EN
FAULT3
EN
FAULT2
EN
FAULT1
EN
FAULT0
EN
0x30EA-0x30EB Reserved — — — — — — — —
0x30EC PORT_IOFLT0 FLTD FLTC FLTB FLTA
0x30ED PORT_IOFLT1 FLTH FLTG FLTF FLTE
0x30EE PORT_IOFLT2 — — FLTKBI1 FLTKBI0 FLTRST
0x30EF PORT_FCLKDIV FLTDIV3 FLTDIV2 FLTDIV1
0x30F0 PORT_PTAPE PTAPE7 PTAPE6 PTAPE5 — PTAPE3 PTAPE2 PTAPE1 PTAPE0
0x30F1 PORT_PTBPE PTBPE7 PTBPE6 PTBPE5 PTBPE4 PTBPE3 PTBPE2 PTBPE1 PTBPE0
0x30F2 PORT_PTCPE PTCPE7 PTCPE6 PTCPE5 PTCPE4 PTCPE3 PTCPE2 PTCPE1 PTCPE0
0x30F3 PORT_PTDPE PTDPE7 PTDPE6 PTDPE5 PTDPE4 PTDPE3 PTDPE2 PTDPE1 PTDPE0
0x30F4 PORT_PTEPE PTEPE7 PTEPE6 PTEPE5 PTEPE4 PTEPE3 PTEPE2 PTEPE1 PTEPE0
0x30F5 PORT_PTFPE PTFPE7 PTFPE6 PTFPE5 PTFPE4 PTFPE3 PTFPE2 PTFPE1 PTFPE0
0x30F6 PORT_PTGPE — — — — PTGPE3 PTGPE2 PTGPE1 PTGPE0
0x30F7 PORT_PTHPE PTHPE7 PTHPE6 — — — PTHPE2 PTHPE1 PTHPE0
0x30F8 SYS_UUID1 ID63 ID62 ID61 ID60 ID59 ID58 ID57 ID56
0x30F9 SYS_UUID2 ID55 ID54 ID53 ID52 ID51 ID50 ID49 ID48
0x30FA SYS_UUID3 ID47 ID46 ID45 ID44 ID43 ID42 ID41 ID40
0x30FB SYS_UUID4 ID39 ID38 ID37 ID36 ID35 ID34 ID33 ID32
0x30FC SYS_UUID5 ID31 ID30 ID29 ID28 ID27 ID26 ID25 ID24
0x30FD SYS_UUID6 ID23 ID22 ID21 ID20 ID19 ID18 ID17 ID16
0x30FE SYS_UUID7 ID15 ID14 ID13 ID12 ID11 ID10 ID9 ID8
0x30FF
SYS_UUID8
ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
Several reserved flash memory locations, shown in the following table, are used for
storing values used by several registers. These registers include an 8-byte backdoor key,
NV_BACKKEY, which can be used to gain access to secure memory resources. During
reset events, the contents of NVPROT and NVOPT in the reserved flash memory are
transferred into corresponding FPROT and FOPT registers in the high-page registers area
to control security and block protection options.
Chapter 4 Memory map
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
Freescale Semiconductor, Inc. 71