Datasheet

Table 4-6. Flash memory addressing
Device Global address
Size
(Bytes)
Description User availability
MC9S08PA60 0x0000 — 0xFFFF 64 KB
Flash block contains
flash configuration field
Sector [0:7]: N/A
Sector [8]: Last 448 bytes available
Sector [9:23]: fully available
Sector [24]: N/A
Sector [25:127]: fully available
MC9S08PA32 0x8000 — 0xFFFF 32 KB
Flash block contains
flash configuration field
Sector [64:127]: fully available
4.5.2.3 Flash and EEPROM initialization after system reset
On each system reset, the flash and EEPROM module executes an initialization sequence
that establishes initial values for the flash and EEPROM block configuration parameters,
the FPROT and EEPROT protection registers, and the FOPT and FSEC registers. The
initialization routine reverts to built-in default values that leave the module in a fully
protected and secured state if errors are encountered during execution of the reset
sequence. If a double bit fault is detected during the reset sequence, both
FSTAT[MGSTAT] bits will be set.
FSTAT[CCIF] is cleared throughout the initialization sequence. The NVM module holds
off all CPU access for a portion of the initialization sequence. Flash and EEPROM reads
are allowed after the hold is removed. Completion of the initialization sequence is
marked by setting FSTAT[CCIF] high, which enables user commands.
If a reset occurs while any flash or EEPROM command is in progress, that command will
be immediately aborted. The state of the word being programmed or the sector/block
being erased is not guaranteed.
4.5.2.4 Flash and EEPROM command operations
Flash and EEPROM command operations are used to modify flash and EEPROM
memory contents.
The command operations contain three steps:
1. Configure the clock for flash or EEPROM program and erase command operations.
2. Use command write sequence to set flash and EEPROM command parameters and
launch execution.
Flash and EEPROM
MC9S08PA60 Reference Manual, Rev. 1, 9/2012
76 Freescale Semiconductor, Inc.