Datasheet

Chapter 5 Resets, Interrupts, and General System Control
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor 69
5.8.3 System Background Debug Force Reset Register (SBDFR)
This high page register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return 0x00.
76543210
R00000000
W BDFR
1
1
BDFR is writable only through serial background debug commands, not from user programs.
Reset:00000000
= Unimplemented or Reserved
Figure 5-4. System Background Debug Force Reset Register (SBDFR)
Table 5-5. SBDFR Register Field Descriptions
Field Description
0
BDFR
Background Debug Force Reset — A serial background command such as WRITE_BYTE can be used to allow
an external debug host to force a target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot
be written from a user program. To enter user mode, PTA4/ACMPO/BKGD/MS must be high immediately after
issuing WRITE_BYTE command. To enter BDM, PTA4/ACMPO/BKGD/MS must be low immediately after issuing
WRITE_BYTE command. See Table A-9., “Control Timing,” for more information.