Datasheet

Analog-to-Digital Converter (S08ADC10V1)

MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5

124 Freescale Semiconductor

9.3.3 Data Result High Register (ADCRH)

ADCRH contains the upper two bits of the result of a 10-bit conversion. When configured for 8-bit

conversions both ADR8 and ADR9 are equal to zero. ADCRH is updated each time a conversion

completes except when automatic compare is enabled and the compare condition is not met. In 10-bit

MODE, reading ADCRH prevents the ADC from transferring subsequent conversion results into the result

registers until ADCRL is read. If ADCRL is not read until after the next conversion is completed, then the

intermediate conversion result will be lost. In 8-bit mode there is no interlocking with ADCRL. In the case

that the MODE bits are changed, any data in ADCRH becomes invalid.

9.3.4 Data Result Low Register (ADCRL)

ADCRL contains the lower eight bits of the result of a 10-bit conversion, and all eight bits of an 8-bit

conversion. This register is updated each time a conversion completes except when automatic compare is

enabled and the compare condition is not met. In 10-bit mode, reading ADCRH prevents the ADC from

transferring subsequent conversion results into the result registers until ADCRL is read. If ADCRL is not

read until the after next conversion is completed, then the intermediate conversion results will be lost. In

8-bit mode, there is no interlocking with ADCRH. In the case that the MODE bits are changed, any data

in ADCRL becomes invalid.

ACFE

Compare Function Enable — ACFE is used to enable the compare function.

0 Compare function disabled

1 Compare function enabled

ACFGT

Compare Function Greater Than Enable — ACFGT is used to configure the compare function to trigger when

the result of the conversion of the input being monitored is greater than or equal to the compare value. The

compare function defaults to triggering when the result of the compare of the input being monitored is less than

the compare value.

0 Compare triggers when input is less than compare level

1 Compare triggers when input is greater than or equal to compare level

7 6543210

R 0 0 0 0 0 0 ADR9 ADR8

Reset: 0 0 0 0 0 0 0 0

= Unimplemented or Reserved

Figure 9-6. Data Result High Register (ADCRH)

Table 9-4. ADCSC2 Register Field Descriptions (continued)

Field Description