Datasheet

Analog-to-Digital Converter (S08ADC10V1)
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
138 Freescale Semiconductor
In cases where separate power supplies are used for analog and digital power, the ground connection
between these supplies must be at the V
SSAD
pin. This should be the only ground connection between these
supplies if possible. The V
SSAD
pin makes a good single point ground location.
9.6.1.2 Analog Reference Pins
In addition to the analog supplies, the ADC module has connections for two reference voltage inputs. The
high reference is V
REFH
, which may be shared on the same pin as V
DDAD
on some devices. The low
reference is V
REFL
, which may be shared on the same pin as V
SSAD
on some devices.
When available on a separate pin, V
REFH
may be connected to the same potential as V
DDAD
, or may be
driven by an external source that is between the minimum V
DDAD
spec and the V
DDAD
potential (V
REFH
must never exceed V
DDAD
). When available on a separate pin, V
REFL
must be connected to the same
voltage potential as V
SSAD
. Both V
REFH
and V
REFL
must be routed carefully for maximum noise
immunity and bypass capacitors placed as near as possible to the package.
AC current in the form of current spikes required to supply charge to the capacitor array at each successive
approximation step is drawn through the V
REFH
and V
REFL
loop. The best external component to meet this
current demand is a 0.1 μF capacitor with good high frequency characteristics. This capacitor is connected
between V
REFH
and V
REFL
and must be placed as near as possible to the package pins. Resistance in the
path is not recommended because the current will cause a voltage drop which could result in conversion
errors. Inductance in this path must be minimum (parasitic only).
9.6.1.3 Analog Input Pins
The external analog inputs are typically shared with digital I/O pins on MCU devices. The pin I/O control
is disabled by setting the appropriate control bit in one of the pin control registers. Conversions can be
performed on inputs without the associated pin control register bit set. It is recommended that the pin
control register bit always be set when using a pin as an analog input. This avoids problems with contention
because the output buffer will be in its high impedance state and the pullup is disabled. Also, the input
buffer draws dc current when its input is not at either V
DD
or V
SS
. Setting the pin control register bits for
all pins used as analog inputs should be done to achieve lowest operating current.
Empirical data shows that capacitors on the analog inputs improve performance in the presence of noise
or when the source impedance is high. Use of 0.01 μF capacitors with good high-frequency characteristics
is sufficient. These capacitors are not necessary in all cases, but when used they must be placed as near as
possible to the package pins and be referenced to V
SSA
.
For proper conversion, the input voltage must fall between V
REFH
and V
REFL
. If the input is equal to or
exceeds V
REFH
, the converter circuit converts the signal to $3FF (full scale 10-bit representation) or $FF
(full scale 8-bit representation). If the input is equal to or less than V
REFL
, the converter circuit converts it
to $000. Input voltages between V
REFH
and V
REFL
are straight-line linear conversions. There will be a
brief current associated with V
REFL
when the sampling capacitor is charging. The input is sampled for
3.5 cycles of the ADCK source when ADLSMP is low, or 23.5 cycles when ADLSMP is high.
For minimal loss of accuracy due to current injection, pins adjacent to the analog input pins should not be
transitioning during conversions.