Datasheet

Appendix A Electrical Characteristics
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
276 Freescale Semiconductor
A.8 AC Characteristics
This section describes timing characteristics for each peripheral system.
A.8.1 Control Timing
Table A-9. Control Timing
Parameter Symbol Min Typ
1
1
Data in Typical column was characterized at 3.0 V, 25°C.
Max Unit
Bus frequency (t
cyc
= 1/f
Bus
)f
Bus
0—10MHz
Real-time interrupt internal oscillator period
t
RTI
700
1000
1300 μs
External reset pulse width
2
2
This is the shortest pulse that is guaranteed to be recognized.
t
extrst
100 — — ns
IRQ
pulse width
Asynchronous path
2
Synchronous path
3
3
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
t
ILIH
100
1.5 t
cyc
——ns
KBIPx pulse width
Asynchronous path
2
Synchronous path
3
t
ILIH,
t
IHIL
100
1.5 t
cyc
——ns
Port rise and fall time (load = 50 pF)
4
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
4
Timing is shown with respect to 20% V
DD
and 80% V
DD
levels. Temperature range –40°C to 85°C.
t
Rise
, t
Fall
—
—
3
30
—
—
ns
BKGD/MS setup time after issuing background debug force
reset to enter user or BDM modes
t
MSSU
500 — — ns
BKGD/MS hold time after issuing background debug force
reset to enter user or BDM modes
5
5
To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t
MSH
after V
DD
rises above V
LVD
.
t
MSH
100 — — μs