Datasheet

Appendix A Electrical Characteristics
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Freescale Semiconductor 279
4 Clock (SPSCK) high or low time
Master
Slave
t
WSPSCK
t
cyc
– 30
t
cyc
– 30
1024 t
cyc
—
ns
ns
5 Data setup time (inputs)
Master
Slave
t
SU
15
15
—
—
ns
ns
6 Data hold time (inputs)
Master
Slave
t
HI
0
25
—
—
ns
ns
7 Slave access time t
a
—1t
cyc
8 Slave MISO disable time t
dis
—1t
cyc
9 Data valid (after SPSCK edge)
Master
Slave
t
v
—
—
25
25
ns
ns
10 Data hold time (outputs)
Master
Slave
t
HO
0
0
—
—
ns
ns
11 Rise time
Input
Output
t
RI
t
RO
—
—
t
cyc
– 25
25
ns
ns
12 Fall time
Input
Output
t
FI
t
FO
—
—
t
cyc
– 25
25
ns
ns
Table A-11. SPI Timing (continued)
No. Function Symbol Min Max Unit