Datasheet
Chapter 7 Central Processor Unit (S08CPUV3)
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
104 Freescale Semiconductor
ASL opr8a
ASLA
ASLX
ASL oprx8,X
ASL ,X
ASL oprx8,SP
Arithmetic Shift Left
(Same as LSL)
DIR
INH
INH
IX1
IX
SP1
38
48
58
68
78
9E 68
dd
ff
ff
5
1
1
5
4
6
rfwpp
p
p
rfwpp
rfwp
prfwpp
11 ––
ASR opr8a
ASRA
ASRX
ASR oprx8,X
ASR ,X
ASR oprx8,SP
Arithmetic Shift Right
DIR
INH
INH
IX1
IX
SP1
37
47
57
67
77
9E 67
dd
ff
ff
5
1
1
5
4
6
rfwpp
p
p
rfwpp
rfwp
prfwpp
11– –
BCC rel
Branch if Carry Bit Clear
(if C = 0)
REL 24 rr 3 ppp –11– ––––
BCLR n,opr8a
Clear Bit n in Memory
(Mn ← 0)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
11
13
15
17
19
1B
1D
1F
dd
dd
dd
dd
dd
dd
dd
dd
5
5
5
5
5
5
5
5
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
rfwpp
–11–
–
–––
BCS rel
Branch if Carry Bit Set (if C = 1)
(Same as BLO)
REL 25 rr 3 ppp –11– ––––
BEQ rel Branch if Equal (if Z = 1) REL 27 rr 3 ppp –11– ––––
BGE rel
Branch if Greater Than or Equal To
(if N ⊕ V = 0) (Signed)
REL 90 rr 3 ppp –11– ––––
BGND
Enter active background if ENBDM=1
Waits for and processes BDM commands
until GO, TRACE1, or TAGGO
INH 82 5+ fp...ppp –11– ––––
BGT rel
Branch if Greater Than (if Z | (N ⊕ V) = 0)
(Signed)
REL 92 rr 3 ppp –11– ––––
BHCC rel Branch if Half Carry Bit Clear (if H = 0) REL 28 rr 3 ppp –11– ––––
BHCS rel Branch if Half Carry Bit Set (if H = 1) REL 29 rr 3 ppp
–11– ––––
BHI rel Branch if Higher (if C
| Z
= 0) REL 22 rr 3 ppp –11– ––––
BHS rel
Branch if Higher or Same (if C = 0)
(Same as BCC)
REL 24 rr 3 ppp –11– ––––
BIH rel Branch if IRQ Pin High (if IRQ pin = 1) REL 2F rr 3 ppp –11– ––––
BIL rel Branch if IRQ Pin Low (if IRQ pin = 0) REL 2E rr 3 ppp –11– ––––
BIT #opr8i
BIT opr8a
BIT opr16a
BIT oprx16,X
BIT oprx8,X
BIT ,X
BIT oprx16,SP
BIT oprx8,SP
Bit Test
(A) & (M)
(CCR Updated but Operands Not Changed)
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
A5
B5
C5
D5
E5
F5
9E D5
9E E5
ii
dd
hh ll
ee ff
ff
ee ff
ff
2
3
4
4
3
3
5
4
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
011– – –
Table 7-2. Instruction Set Summary (Sheet 2 of 9)
Source
Form
Operation
Address
Mode
Object Code
Cycles
Cyc-by-Cyc
Details
Affect
on CCR
V 1 1 HI N Z C
C
b0
b7
0
b0
b7
C