Datasheet

Chapter 1 Device Overview
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor 21
The block diagram in Figure 1-2 shows the structure of the MC9S08SL16 Series.
Figure 1-2. MC9S08SL16 and MC9S08SL8 Block Diagram
V
SS
IIC MODULE (IIC)
SERIAL PERIPHERAL
INTERFACE MODULE (SPI)
USER FLASH
USER RAM
16K / 8K
HCS08 CORE
CPU
BDC
2-CHANNEL TIMER/PWM
MODULE (TPM2)
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
VOLTAGE
REGULATOR
COP
LVD
OSCILLATOR (XOSC)
INTERNAL
CLOCK SOURCE (ICS)
RESET
V
REFH
512 bytes
INTERFACE (SCI)
SERIAL COMMUNICATIONS
XTAL
EXTAL
2-CHANNEL TIMER/PWM
MODULE (TPM1)
REAL-TIME COUNTER
IN-CIRCUIT EMULATOR (ICE)
BKGD/MS
PTA3/PIA3/SCL/TxD/ADP3
PTA6/TPM2CH0
PTA2/PIA2/SDA/RxD/ACMP1O/ADP2
PTA1/PIA1/TPM2CH0/ACMP1–/ADP1
PTA0/PIA0/TPM1CH0/TCLK/ACMP1+/ADP0
PTA7/TPM2CH1
PTB3/PIB3/SCL/MOSI/ADP7
PTB4/TPM2CH1/MISO
PTB2/PIB2/SDA/SPSCK/ADP6
PTB1/PIB1/SLTxD/TxD/ADP5
PTB0/PIB0/SLRxD/RxD/ADP4
PTB7/SCL/EXTAL
PTC3/PIC3/ADP11
PTC4/PIC4/ADP12
PTC5/PIC5/ADP13
PTC2/PIC2/ADP10
PTC1/PIC1/TPM1CH1/ADP9
PORT C
PTC6/PIC6/ADP14
V
DD
BKP
INT
USER EEPROM
256 bytes
CONTROLLER (SLIC)
SLAVE LIN INTERFACE
ANALOG-TO-DIGITAL
CONVERTER (ADC)
16-CHANNEL,10-BIT
16
= In 20-pin packages, V
DDA
/V
REFH
is internally connected to V
DD
and V
SSA
/V
REFL
is internally connected to V
SS
.
V
DDA
/
V
REFL
V
SSA
/
DEBUG MODULE (DBG)
ON-CHIP
(RTC)
PTC0/PIC0/TPM1CH0/ADP8
PTC7/PIC7/ADP15
PTB6/SDA/XTAL
PORT B
PORT A
PTB5/TPM1CH1/SS
ANALOG COMPARATOR
(ACMP1)
= Not bonded to pins in 20-pin package
TCLK
TCLK
+
–
OUT
0
1
1
0
RxD
TxD
Tx
Rx