Datasheet

Appendix A Electrical Characteristics
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Freescale Semiconductor 349
Figure A-13. Timer Input Capture Pulse
A.12.3 SPI
Table A-15 and Figure A-14 through Figure A-17 describe the timing requirements for the SPI system.
Table A-15. SPI Electrical Characteristic
Num
1
CRating
2
Symbol Min Max Unit
1 D Cycle time
Master
Slave
t
SCK
t
SCK
2
4
2048
—
t
cyc
t
cyc
2 D Enable lead time
Master
Slave
t
Lead
t
Lead
—
1/2
1/2
—
t
SCK
t
SCK
3 D Enable lag time
Master
Slave
t
Lag
t
Lag
—
1/2
1/2
—
t
SCK
t
SCK
4 D Clock (SPSCK) high time
Master and Slave
t
SCKH
1/2 t
SCK
– 25 — ns
5 D Clock (SPSCK) low time
Master and Slave
t
SCKL
1/2 t
SCK
– 25 — ns
6 D Data setup time (inputs)
Master
Slave
t
SI(M)
t
SI(S)
30
30
—
—
ns
ns
7 D Data hold time (inputs)
Master
Slave
t
HI(M)
t
HI(S)
30
30
—
—
ns
ns
8 D Access time, slave
3
t
A
040ns
9 D Disable time, slave
4
t
dis
—40ns
10 D Data setup time (outputs)
Master
Slave
t
SO
t
SO
—
—
25
25
ns
ns
t
ICPW
TPMCHn
t
ICPW
TPMCHn